239 search results - page 21 / 48 » A Performance Evaluation of the Convex SPP-1000 Scalable Sha... |
ISHPC
2003
Springer
14 years 21 days ago
2003
Springer
We developed a multithreaded parallel implementation of a sequence alignment algorithm that is able to align whole genomes with reliable output and reasonable cost. This paper pres...
ANCS
2009
ACM
13 years 5 months ago
2009
ACM
In this paper we introduce the Range Trie, a new multiway tree data structure for address lookup. Each Range Trie node maps to an address range [Na, Nb) and performs multiple comp...
PODC
2011
ACM
12 years 10 months ago
2011
ACM
We present the Mindicator, a set implementation customized for shared memory runtime systems. The Mindicator is optimized for constant-time querying of its minimum element, while ...
PC
2007
13 years 7 months ago
2007
This paper presents the implementation of MPICH2 over the Nemesis communication subsystem and the evaluation of its shared-memory performance. We describe design issues as well as...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
At the core of contemporary high performance computer systems is the communication infrastructure. For this reason, there has been a lot of work on providing low-latency, high-ban...