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VLSID
1999
IEEE
97views VLSI» more  VLSID 1999»
14 years 1 months ago
A New Methodology for Concurrent Technology Development and Cell Library Optimization
To minimize the time to market and cost of new sub 0.25um process technologies and products, PDF Solutions, Inc., has developed a new comprehensive approach based on the use of pr...
Marko P. Chew, Sharad Saxena, Thomas F. Cobourn, P...
AAECC
2007
Springer
87views Algorithms» more  AAECC 2007»
13 years 9 months ago
Towards an accurate performance modeling of parallel sparse factorization
We present a simulation-based performance model to analyze a parallel sparse LU factorization algorithm on modern cached-based, high-end parallel architectures. We consider supern...
Laura Grigori, Xiaoye S. Li
DATE
2009
IEEE
143views Hardware» more  DATE 2009»
14 years 3 months ago
Dimensioning heterogeneous MPSoCs via parallelism analysis
—In embedded computing we face a continuously growing algorithm complexity combined with a constantly rising number of applications running on a single system. Multi-core systems...
Bastian Ristau, Torsten Limberg, Oliver Arnold, Ge...
IPPS
2005
IEEE
14 years 2 months ago
A Compiler Method for Memory-Conscious Mapping of Applications on Coarse-Grained Reconfigurable Architectures
This paper presents a compiler methodology for memoryaware mapping on 2-Dimensional coarse-grained reconfigurable architectures that aims in improving the mapped applications’ p...
Grigoris Dimitroulakos, Michalis D. Galanis, Costa...
EUROPAR
2005
Springer
14 years 2 months ago
Performance Modeling: Understanding the Past and Predicting the Future
We present an overview of current research in performance modeling, focusing on efforts underway in the Performance Evaluation Research Center (PERC). Using some new techniques, w...
David H. Bailey, Allan Snavely