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IPPS
2006
IEEE
14 years 3 months ago
FPGA implementation of a license plate recognition SoC using automatically generated streaming accelerators
Modern FPGA platforms provide the hardware and software infrastructure for building a bus-based System on Chip (SoC) that meet the applications requirements. The designer can cust...
Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan L...
HPCN
2000
Springer
14 years 16 days ago
An Analytical Model for a Class of Architectures under Master-Slave Paradigm
We build an analytical model for an application utilizing master-slave paradigm. In the model, only three architecture parameters are used: latency, bandwidth and flop rate. Instea...
Yasemin Yalçinkaya, Trond Steihaug
IPPS
2003
IEEE
14 years 2 months ago
Quantifying Locality Effect in Data Access Delay: Memory logP
The application of hardware-parameterized models to distributed systems can result in omission of key bottlenecks such as the full cost of inter-node communication in a shared mem...
Kirk W. Cameron, Xian-He Sun
IPPS
2003
IEEE
14 years 2 months ago
Accurate Method for Fast Design of Diagnostic Oligonucleotide Probe Sets for DNA Microarrays
We present a method for the automatic generation of oligonucleotide probe sets for DNA microarrays. This approach is well suited particularly for specificity evaluation of design...
Andreas Krause, Markus Kräutner, Harald Meier
HPDC
2006
IEEE
14 years 3 months ago
On the Harmfulness of Redundant Batch Requests
Most parallel computing resources are controlled by batch schedulers that place requests for computation in a queue until access to compute nodes is granted. Queue waiting times a...
Henri Casanova