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ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
14 years 5 months ago
Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
Yu Hu, Satyaki Das, Steven Trimberger, Lei He
GECCO
2011
Springer
274views Optimization» more  GECCO 2011»
13 years 6 days ago
Fuzzy dynamical genetic programming in XCSF
—A number of representation schemes have been presented for use within Learning Classifier Systems, ranging from binary encodings to Neural Networks, and more recently Dynamical ...
Richard Preen, Larry Bull
TCAD
2002
146views more  TCAD 2002»
13 years 8 months ago
Static scheduling of multidomain circuits for fast functional verification
With the advent of system-on-a-chip design, many application specific integrated circuits (ASICs) now require multiple design clocks that operate asynchronously to each other. This...
Murali Kudlugi, Russell Tessier
TYPES
1995
Springer
14 years 7 days ago
A Natural Deduction Approach to Dynamic Logic
Natural Deduction style presentations of program logics are useful in view of the implementation of such logics in interactive proof development environments, based on type theory,...
Furio Honsell, Marino Miculan
JUCS
2006
175views more  JUCS 2006»
13 years 8 months ago
The Design of the YAP Compiler: An Optimizing Compiler for Logic Programming Languages
: Several techniques for implementing Prolog in a efficient manner have been devised since the original interpreter, many of them aimed at achieving more speed. There are two main ...
Anderson Faustino da Silva, Vítor Santos Co...