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» A Really Temporal Logic
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DATE
2000
IEEE
90views Hardware» more  DATE 2000»
14 years 1 months ago
Cost Reduction and Evaluation of a Temporary Faults Detecting Technique
: IC technologies are approaching the ultimate limits of silicon in terms of channel width, power supply and speed. By approaching these limits, circuits are becoming increasingly ...
Lorena Anghel, Michael Nicolaidis
DSN
2000
IEEE
14 years 1 months ago
An Automatic SPIN Validation of a Safety Critical Railway Control System
This paper describes an experiment in formal specification and validation performed in the context of an industrial joint project. The project involved an Italian company working...
Stefania Gnesi, Diego Latella, Gabriele Lenzini, C...
ISSTA
2000
ACM
14 years 1 months ago
Verisim: Formal analysis of network simulations
—Network protocols are often analyzed using simulations. We demonstrate how to extend such simulations to check propositions expressing safety properties of network event traces ...
Karthikeyan Bhargavan, Carl A. Gunter, Moonjoo Kim...
AMAST
2000
Springer
14 years 1 months ago
Meta Languages in Algebraic Compilers
Abstract. Algebraic compilers provide a powerful and convenient mechanism for specifying language translators. With each source language operation one associates a computation for ...
Eric Van Wyk
CAV
2000
Springer
141views Hardware» more  CAV 2000»
14 years 1 months ago
Binary Reachability Analysis of Discrete Pushdown Timed Automata
We introduce discrete pushdown timed automata that are timed automata with integer-valued clocks augmented with a pushdown stack. A con guration of a discrete pushdown timed automa...
Zhe Dang, Oscar H. Ibarra, Tevfik Bultan, Richard ...