Sciweavers

43 search results - page 3 / 9
» A Reconfigurable Generic Dual-Core Architecture
Sort
View
AHS
2007
IEEE
239views Hardware» more  AHS 2007»
13 years 11 months ago
Separation of Data flow and Control flow in Reconfigurable Multi-core SoCs using the Gannet Service-based Architecture
This paper presents a mechanism for the separation of control and data flow in NoC-based SoCs consisting of multiple heterogeneous reconfigurable IP cores. This mechanism enables ...
Wim Vanderbauwhede
AHS
2006
IEEE
124views Hardware» more  AHS 2006»
14 years 1 months ago
A Generic On-Chip Debugger for Wireless Sensor Networks
— This invited paper overviews the low level debug support hardware required for an on-chip predeployment debugging system for sensor networks. The solution provides significant...
Andrew B. T. Hopkins, Klaus D. McDonald-Maier
DAIS
2008
13 years 9 months ago
Facilitating Gossip Programming with the GossipKit Framework
Gossip protocols have been successfully applied in the last few years to address a wide range of functionalities. So far, however, very few software frameworks have been proposed t...
Shen Lin 0003, François Taïani, Gordon...
DATE
2006
IEEE
96views Hardware» more  DATE 2006»
14 years 1 months ago
Multi-sensor configurable platform for automotive applications
This paper presents a configurable and generic platform architecture suitable to interface several kinds of sensors for automotive applications. A platform-based design approach i...
L. Serafini, F. Carrai, T. Ramacciotti, V. Zolesi
IPPS
2006
IEEE
14 years 1 months ago
Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...