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HPCA
1996
IEEE
13 years 12 months ago
Co-Scheduling Hardware and Software Pipelines
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded process...
Ramaswamy Govindarajan, Erik R. Altman, Guang R. G...
CAMAD
2006
IEEE
13 years 11 months ago
Improving quality of service for switched processing systems
Switched Processing Systems (SPS) capture the essence of a fundamental resource allocation problem in many modern communication, computer and manufacturing systems involving hetero...
Ying-Chao Hung, George Michailidis
ICPADS
2002
IEEE
14 years 21 days ago
Evaluating and Improving Performance of Multimedia Applications on Simultaneous Multi-Threading
This paper presents the study and results of running several core multimedia applications on a simultaneous multithreading (SMT) architecture, including some detailed analysis ran...
Yen-Kuang Chen, Eric Debes, Rainer Lienhart, Matth...
HPCA
2008
IEEE
14 years 8 months ago
Runahead Threads to improve SMT performance
In this paper, we propose Runahead Threads (RaT) as a valuable solution for both reducing resource contention and exploiting memory-level parallelism in Simultaneous Multithreaded...
Tanausú Ramírez, Alex Pajuelo, Olive...
CCGRID
2005
IEEE
14 years 1 months ago
Data grid performance analysis through study of replication and storage infrastructure parameters
Running Data Grid applications such as High Energy Nuclear Physics (HENP) and weather modelling experiments involves working with huge data sets possibly of hundreds of Terabytes ...
Ernest Sithole, Gerard P. Parr, Sally I. McClean