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SCAM
2008
IEEE
14 years 1 months ago
Automatic Determination of May/Must Set Usage in Data-Flow Analysis
Data-flow analysis is a common technique to gather program information for use in transformations such as register allocation, dead-code elimination, common subexpression elimina...
Andrew Stone, Michelle Strout, Shweta Behere
MICRO
2005
IEEE
126views Hardware» more  MICRO 2005»
14 years 1 months ago
Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System
Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
ISBI
2007
IEEE
14 years 1 months ago
Multiview Registration of Cardiac Tagging Mri Images
This paper introduces a new method based on k-Nearest Neighbors Graphs (KNNG) for bringing into alignment multiple views of the same scene acquired at two different time points. T...
Estanislao Oubel, Mathieu De Craene, Mattia Gazzol...
IEEEPACT
2002
IEEE
14 years 12 days ago
Eliminating Exception Constraints of Java Programs for IA-64
Java exception checks are designed to ensure that any faulting instruction causing a hardware exception does not terminate the program abnormally. These checks, however, impose so...
Kazuaki Ishizaki, Tatsushi Inagaki, Hideaki Komats...
IPPS
2007
IEEE
14 years 1 months ago
Pipelining Tradeoffs of Massively Parallel SuperCISC Hardware Functions
Parallel processing using multiple processors is a well-established technique to accelerate many different classes of applications. However, as the density of chips increases, ano...
Colin J. Ihrig, Justin Stander, Alex K. Jones