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» A Scalable FPGA-based Multiprocessor
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ISSS
2002
IEEE
136views Hardware» more  ISSS 2002»
14 years 1 months ago
Combined Functional Partitioning and Communication Speed Selection for Networked Voltage-Scalable Processors
This paper presents a new technique for global energy optimization through coordinated functional partitioning and speed selection for embedded processors interconnected by a high...
Nader Bagherzadeh, Pai H. Chou, Jinfeng Liu
RTSS
1995
IEEE
14 years 3 days ago
A Scalable Real-Time Synchronization Protocol for Distributed Systems
A distributed protocol is proposed for the synchronization of real-time tasks that have variable resource requirements. The protocol is simple to implement and is intended for lar...
Injong Rhee, Graham R. Martin
DSN
2011
IEEE
12 years 8 months ago
Transparent dynamic binding with fault-tolerant cache coherence protocol for chip multiprocessors
—Aggressive technology scaling causes chip multiprocessors increasingly error-prone. Core-level faulttolerant approaches bind two cores to implement redundant execution and error...
Shuchang Shan, Yu Hu, Xiaowei Li
PPOPP
2009
ACM
14 years 9 months ago
A compiler-directed data prefetching scheme for chip multiprocessors
Data prefetching has been widely used in the past as a technique for hiding memory access latencies. However, data prefetching in multi-threaded applications running on chip multi...
Dhruva Chakrabarti, Mahmut T. Kandemir, Mustafa Ka...
CORR
2010
Springer
128views Education» more  CORR 2010»
13 years 8 months ago
A Performance Study of GA and LSH in Multiprocessor Job Scheduling
Multiprocessor task scheduling is an important and computationally difficult problem. This paper proposes a comparison study of genetic algorithm and list scheduling algorithm. Bo...
S. R. Vijayalakshmi, G. Padmavathi