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FTCS
1998
79views more  FTCS 1998»
13 years 9 months ago
Proving Correctness of a Controller Algorithm for the RAID Level 5 System
Most RAID controllers implemented in industry are complicated and di cult to reason about. This complexity has led to software and hardware systems that are di cult to debug and h...
Mandana Vaziri, Nancy A. Lynch, Jeannette M. Wing
AICCSA
2005
IEEE
124views Hardware» more  AICCSA 2005»
14 years 1 months ago
On multicast scheduling and routing in multistage Clos networks
Multicast communication, which involves transmitting information from one node to multiple nodes, is a vital operation in both broadband integrated services digital networks (BISD...
Bin Tang
EMSOFT
2010
Springer
13 years 5 months ago
Optimal WCET-aware code selection for scratchpad memory
We propose the first polynomial-time code selection algorithm for minimising the worst-case execution time of a nonnested loop executed on a fully pipelined processor that uses sc...
Hui Wu, Jingling Xue, Sridevan Parameswaran
AISS
2010
155views more  AISS 2010»
13 years 5 months ago
An Adaptive HW/SW Dual Communication Mode
HW/SW communication mode makes significant impact on HW/SW communication efficiency. Based on the characteristics of the hardware functions, this paper presents an adaptive HW/SW ...
Wang-xian Yang, Dong-hua Liu, Ding-ju Zhu
DATE
2006
IEEE
95views Hardware» more  DATE 2006»
13 years 11 months ago
Satisfiability-based framework for enabling side-channel attacks on cryptographic software
- Many electronic systems contain implementations of cryptographic algorithms in order to provide security. It is well known that cryptographic algorithms, irrespective of their th...
Nachiketh R. Potlapally, Anand Raghunathan, Srivat...