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ISPASS
2010
IEEE
14 years 2 months ago
Runahead execution vs. conventional data prefetching in the IBM POWER6 microprocessor
After many years of prefetching research, most commercially available systems support only two types of prefetching: software-directed prefetching and hardware-based prefetchers u...
Harold W. Cain, Priya Nagpurkar
ACSD
2005
IEEE
169views Hardware» more  ACSD 2005»
14 years 1 months ago
Automating Synthesis of Asynchronous Communication Mechanisms
Asynchronous data communication mechanisms (ACMs) have been extensively studied as data connectors between independently timed processes in digital systems. In previous work, syst...
Jordi Cortadella, Kyller Costa Gorgônio, Fei...
FPL
2008
Springer
138views Hardware» more  FPL 2008»
13 years 9 months ago
An efficient run-time router for connecting modules in FPGAS
It is often desirable to change the logic and/or the connections within an FPGA design on-the-fly without the benefit of a workstation or vendor CAD software. This paper presents ...
Jorge Surís, Cameron Patterson, Peter Athan...
SIGOPS
2010
179views more  SIGOPS 2010»
13 years 2 months ago
Online cache modeling for commodity multicore processors
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...
Richard West, Puneet Zaroo, Carl A. Waldspurger, X...
ICRA
1994
IEEE
127views Robotics» more  ICRA 1994»
13 years 11 months ago
"RISC" for Industrial Robotics: Recent Results and Open Problems
At the intersection of robotics, computational geometry, and manufacturingengineering, we have identifieda collection of research problems with near-term industrial applications. ...
John F. Canny, Kenneth Y. Goldberg