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» A Scheduling and Pipelining Algorithm for Hardware Software ...
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120
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DAC
2001
ACM
16 years 3 months ago
Hardware/Software Instruction Set Configurability for System-on-Chip Processors
New application-focused system-on-chip platforms motivate new application-specific processors. Configurable and extensible processor architectures offer the efficiency of tuned lo...
Albert Wang, Earl Killian, Dror E. Maydan, Chris R...
136
Voted
CF
2007
ACM
15 years 6 months ago
An analysis of the effects of miss clustering on the cost of a cache miss
In this paper we describe a new technique, called pipeline spectroscopy, and use it to measure the cost of each cache miss. The cost of a miss is displayed (graphed) as a histogra...
Thomas R. Puzak, Allan Hartstein, Philip G. Emma, ...
136
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HPDC
2008
IEEE
15 years 2 months ago
A two-level scheduler to dynamically schedule a stream of batch jobs in large-scale grids
This paper describes the study conducted to design and evaluate a two-level on-line scheduler to dynamically schedule a stream of sequential and multi-threaded batch jobs on large...
Marco Pasquali, Ranieri Baraglia, Gabriele Capanni...
111
Voted
UIST
2000
ACM
15 years 7 months ago
System lag tests for augmented and virtual environments
We describe a simple technique for accurately calibrating the temporal lag in augmented and virtual environments within the Enhanced Virtual Hand Lab (EVHL), a collection of hardw...
Colin Swindells, John Dill, Kellogg S. Booth
132
Voted
ECBS
2010
IEEE
224views Hardware» more  ECBS 2010»
15 years 9 months ago
Timed Automata Model for Component-Based Real-Time Systems
—One of the key challenges in modern real-time embedded systems is safe composition of different software components. Formal verification techniques provide the means for design...
Georgiana Macariu, Vladimir Cretu