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» A Security Architecture for Computational Grids
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DAC
2000
ACM
14 years 10 months ago
Convex delay models for transistor sizing
This paper derives a methodology for developing accurate convex delay models to be used for transistor sizing. A new rich class of convex functions to model gate delay is presente...
Mahesh Ketkar, Kishore Kasamsetty, Sachin S. Sapat...
ICCS
2005
Springer
14 years 2 months ago
Hierarchical Infrastructure for Large-Scale Distributed Privacy-Preserving Data Mining
Abstract. Data Mining is often required to be performed among a number of groups of sites, where the precondition is that no privacy of any site should be leaked out to other sites...
Jinlong Wang, Congfu Xu, Huifeng Shen, Yunhe Pan
PRESENCE
2010
76views more  PRESENCE 2010»
13 years 3 months ago
Modularity for Large Virtual Reality Applications
This paper focuses on the design of high performance VR applications. These applications usually involve various I/O devices and complex simulations. A parallel architecture or gri...
Jérémie Allard, Jean-Denis Lesage, B...
DSN
2009
IEEE
14 years 3 months ago
Decoupling Dynamic Information Flow Tracking with a dedicated coprocessor
Dynamic Information Flow Tracking (DIFT) is a promising security technique. With hardware support, DIFT prevents a wide range of attacks on vulnerable software with minimal perfor...
Hari Kannan, Michael Dalton, Christos Kozyrakis
IPPS
2003
IEEE
14 years 2 months ago
Effective Utilization and Reconfiguration of Distributed Hardware Resources Using Job Management Systems
Reconfigurable hardware resources are very expensive, and yet can be underutilized. This paper describes a middleware capable of discovering underutilized computing nodes with FPG...
Kris Gaj, Tarek A. El-Ghazawi, Nikitas A. Alexandr...