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» A Self-Reconfigurable Gate Array Architecture
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FPGA
2000
ACM
175views FPGA» more  FPGA 2000»
13 years 11 months ago
An FPGA implementation and performance evaluation of the Serpent block cipher
With the expiration of the Data Encryption Standard (DES) in 1998, the Advanced Encryption Standard (AES) development process is well underway. It is hoped that the result of the ...
Adam J. Elbirt, Christof Paar
VLSISP
2008
239views more  VLSISP 2008»
13 years 7 months ago
An Embedded Real-Time Surveillance System: Implementation and Evaluation
This paper presents the design of an embedded automated digital video surveillance system with real-time performance. Hardware accelerators for video segmentation, morphological op...
Fredrik Kristensen, Hugo Hedberg, Hongtu Jiang, Pe...
PVLDB
2010
166views more  PVLDB 2010»
13 years 6 months ago
Complex Event Detection at Wire Speed with FPGAs
Complex event detection is an advanced form of data stream processing where the stream(s) are scrutinized to identify given event patterns. The challenge for many complex event pr...
Louis Woods, Jens Teubner, Gustavo Alonso
ICASSP
2011
IEEE
12 years 11 months ago
Multi-rate polyphase DSP and LMS calibration schemes for oversampled data conversion systems
—Architectural schemes for low-power calibration of oversampled analog-to-digital (A/D) systems are presented. Conventional full-rate least-mean squares (LMS) calibration has two...
Subhanshu Gupta, Yi Tang, Kuang-Wei Cheng, Jeyanan...
FPGA
2005
ACM
215views FPGA» more  FPGA 2005»
14 years 1 months ago
Design, layout and verification of an FPGA using automated tools
Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...
Ian Kuon, Aaron Egier, Jonathan Rose