Sciweavers

132 search results - page 24 / 27
» A Self-Tuning Configurable Cache
Sort
View
HPCA
2002
IEEE
14 years 7 months ago
Bandwidth Adaptive Snooping
This paper advocates that cache coherence protocols use a bandwidth adaptive approach to adjust to varied system configurations (e.g., number of processors) and workload behaviors...
Milo M. K. Martin, Daniel J. Sorin, Mark D. Hill, ...
ICPPW
2008
IEEE
14 years 1 months ago
Performance Analysis and Optimization of Parallel Scientific Applications on CMP Cluster Systems
Chip multiprocessors (CMP) are widely used for high performance computing. Further, these CMPs are being configured in a hierarchical manner to compose a node in a cluster system....
Xingfu Wu, Valerie E. Taylor, Charles W. Lively, S...
IPPS
2000
IEEE
13 years 11 months ago
On the Scheduling Algorithm of the Dynamically Trace Scheduled VLIW Architecture
In a machine that follows the dynamically trace scheduled VLIW (DTSVLIW) architecture, VLIW instructions are built dynamically through an algorithm that can be implemented in hard...
Alberto Ferreira de Souza, Peter Rounce
ISCA
1998
IEEE
139views Hardware» more  ISCA 1998»
13 years 11 months ago
Simultaneous Multithreading: Maximizing On-Chip Parallelism
This paper examines simultaneous multithreading, a technique permitting several independent threads to issue instructions to a superscalar's multiple functional units in a si...
Dean M. Tullsen, Susan J. Eggers, Henry M. Levy
DEXA
1998
Springer
140views Database» more  DEXA 1998»
13 years 11 months ago
An Analytical Study of Object Identifier Indexing
The object identifier index of an object-oriented database system is typically 20% of the size of the database itself, and for large databases, only a small part of the index fits...
Kjetil Nørvåg, Kjell Bratbergsengen