Sciweavers

7452 search results - page 86 / 1491
» A Semantics for Multiprocessor Systems
Sort
View
110
Voted
ISCA
1993
IEEE
92views Hardware» more  ISCA 1993»
15 years 7 months ago
The Detection and Elimination of Useless Misses in Multiprocessors
In this paper we introduce a classification of misses in shared-memory multiprocessors based on inter processor communication. We identify the set of essential misses, i.e., the s...
Michel Dubois, Jonas Skeppstedt, Livio Ricciulli, ...
131
Voted
ASAP
2008
IEEE
120views Hardware» more  ASAP 2008»
15 years 5 months ago
Lightweight DMA management mechanisms for multiprocessors on FPGA
This paper presents a multiprocessor system on FPGA that adopts Direct Memory Access (DMA) mechanisms to move data between the external memory and the local memory of each process...
Antonino Tumeo, Matteo Monchiero, Gianluca Palermo...
115
Voted
ICCD
2006
IEEE
139views Hardware» more  ICCD 2006»
16 years 14 days ago
Perceptron Based Consumer Prediction in Shared-Memory Multiprocessors
Abstract— Recent research has shown that forwarding speculative data to other processors before it is requested can improve the performance of multiprocessor systems. The most re...
Sean Leventhal, Manoj Franklin
113
Voted
ICS
2009
Tsinghua U.
15 years 10 months ago
Dynamic cache clustering for chip multiprocessors
This paper proposes DCC (Dynamic Cache Clustering), a novel distributed cache management scheme for large-scale chip multiprocessors. Using DCC, a per-core cache cluster is compri...
Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem
171
Voted
APCSAC
2007
IEEE
15 years 10 months ago
Implicit Transactional Memory in Kilo-Instruction Multiprocessors
Although they have been the main server technology for many years, multiprocessors are undergoing a renaissance due to multi-core chips and the attractive scalability properties of...
Marco Galluzzi, Enrique Vallejo, Adrián Cri...