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TC
2010
14 years 9 months ago
Architectures and Execution Models for Hardware/Software Compilation and Their System-Level Realization
We propose an execution model that orchestrates the fine-grained interaction of a conventional general-purpose processor (GPP) and a high-speed reconfigurable hardware accelerator ...
Holger Lange, Andreas Koch
WCRE
2008
IEEE
15 years 9 months ago
Data Model Reverse Engineering in Migrating a Legacy System to Java
Central to any legacy migration project is the translation of the data model. Decisions made here will have strong implications to the rest of the translation. Some legacy languag...
Mariano Ceccato, Thomas Roy Dean, Paolo Tonella, D...
DATE
2002
IEEE
146views Hardware» more  DATE 2002»
15 years 7 months ago
Automatic Generation of Fast Timed Simulation Models for Operating Systems in SoC Design
To enable fast and accurate evaluation of HW/SW implementation choices of on-chip communication, we present a method to automatically generate timed OS simulation models. The meth...
Sungjoo Yoo, Gabriela Nicolescu, Lovic Gauthier, A...
ISCAS
2003
IEEE
134views Hardware» more  ISCAS 2003»
15 years 7 months ago
Analog and mixed signal modelling with SystemC-AMS
SystemC will become more and more important for the design of digital circuits from the specification down to the RT-Level. Complex systems often contain analog components. This p...
Alain Vachoux, Christoph Grimm, Karsten Einwich
SIGSOFT
2001
ACM
16 years 3 months ago
Combining UML and formal notations for modelling real-time systems
This article explores a dual approach to real-time software development. Models are written in UML, as this is expected to be relatively easy and economic. Then models are automat...
Luigi Lavazza, Gabriele Quaroni, Matteo Venturelli