740 search results - page 73 / 148 » A Spatial Logic for Concurrency |
149
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IOLTS
2003
IEEE
15 years 10 months ago
2003
IEEE
A methodology for the synthesis of partially selfchecking multilevel logic circuits with low-cost paritybased concurrent error detection (CED) is described. A subset of the inputs...
131
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IPPS
1997
IEEE
15 years 9 months ago
1997
IEEE
Naive parallel implementation of nondeterministic systems (such as a theorem proving system) and languages (such as a logic, constraint, or a concurrent constraint language)can re...
147
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APAL
2008
15 years 5 months ago
2008
System BV is an extension of multiplicative linear logic (MLL) with the rules mix, nullary mix, and a self-dual, non-commutative logical operator, called seq. While the rules mix ...
133
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DAC
2005
ACM
16 years 6 months ago
2005
ACM
This paper presents a unifying framework for the modeling of asynchronous pipeline circuits. A pipeline protocol is captured in a graph-based model which defines the partial order...
130
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ECMAST
1997
Springer
15 years 9 months ago
1997
Springer
: This paper attempts to evaluate quantitatively the performance trade-offs involved in applying object-oriented software methodologies to region-based representations of images an...