740 search results - page 89 / 148 » A Spatial Logic for Concurrency |
WETICE
1997
IEEE
13 years 12 months ago
1997
IEEE
When an artifact is designed the typical output consists of documents describing the final result of a long series of deliberations and tradeoffs by the participants of collaborat...
CONCUR
2011
Springer
12 years 7 months ago
2011
Springer
The problem of model checking threads interacting purely via the standard synchronization primitives is key for many concurrent program analyses, particularly dataflow analysis. U...
EUSAI
2007
Springer
13 years 9 months ago
2007
Springer
Developing applications for smart spaces is a challenging task. Most programming systems narrowly focus on the embedded computer infrastructure and neglect the spatial aspect of th...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
Efficient management of last level caches (LLCs) plays an important role in bridging the performance gap between processor cores and main memory. This paper is motivated by two key...
FCCM
2006
IEEE
14 years 1 months ago
2006
IEEE
The growth in size and performance of Field Programmable Gate Arrays (FPGAs) has compelled System-on-aProgrammable-Chip (SoPC) designers to use soft processors for controlling sys...