86 search results - page 17 / 18 » A Study of a Simultaneous Multithreaded Processor Implementa... |
DATE
2010
IEEE
13 years 7 months ago
2010
IEEE
Abstract—We present a transactional datapath specification (Tspec) and the tool (T-piper) to synthesize automatically an inpelined implementation from it. T-spec abstractly views...
IEEEPACT
2008
IEEE
14 years 1 months ago
2008
IEEE
In a hardware transactional memory system with lazy versioning and lazy conflict detection, the process of transaction commit can emerge as a bottleneck. This is especially true ...
SIGARCH
2008
13 years 7 months ago
2008
1 This paper presents a simple but effective method to reduce on-chip access latency and improve core isolation in CMP Non-Uniform Cache Architectures (NUCA). The paper introduces ...
CTRSA
2005
Springer
14 years 29 days ago
2005
Springer
We study the feasibility of using Graphics Processing Units (GPUs) for cryptographic processing, by exploiting the ability for GPUs to simultaneously process large quantities of pi...
GECCO
2009
Springer
14 years 2 months ago
2009
Springer
Solving complex, real-world problems with genetic programming (GP) can require extensive computing resources. However, the highly parallel nature of GP facilitates using a large n...