Sciweavers

86 search results - page 8 / 18
» A Study of a Simultaneous Multithreaded Processor Implementa...
Sort
View
CGO
2004
IEEE
14 years 1 months ago
Physical Experimentation with Prefetching Helper Threads on Intel's Hyper-Threaded Processors
Pre-execution techniques have received much attention as an effective way of prefetching cache blocks to tolerate the everincreasing memory latency. A number of pre-execution tech...
Dongkeun Kim, Shih-Wei Liao, Perry H. Wang, Juan d...
CSE
2008
IEEE
13 years 11 months ago
Exploiting Intensive Multithreading for the Efficient Simulation of 3D Seismic Wave Propagation
Parallel computing is widely used for large scale threedimensional simulation of seismic wave propagation. One particularity of most of these simulations is to consider a finite c...
Fabrice Dupros, Hideo Aochi, Ariane Ducellier, Dim...
IPPS
2008
IEEE
14 years 4 months ago
Design of scalable dense linear algebra libraries for multithreaded architectures: the LU factorization
The scalable parallel implementation, targeting SMP and/or multicore architectures, of dense linear algebra libraries is analyzed. Using the LU factorization as a case study, it is...
Gregorio Quintana-Ortí, Enrique S. Quintana...
ISHPC
2003
Springer
14 years 3 months ago
Code and Data Transformations for Improving Shared Cache Performance on SMT Processors
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
Dimitrios S. Nikolopoulos
GECCO
2009
Springer
192views Optimization» more  GECCO 2009»
13 years 7 months ago
Improving SMT performance: an application of genetic algorithms to configure resizable caches
Simultaneous Multithreading (SMT) is a technology aimed at improving the throughput of the processor core by applying Instruction Level Parallelism (ILP) and Thread Level Parallel...
Josefa Díaz, José Ignacio Hidalgo, F...