323 search results - page 15 / 65 » A Survey of Automated Techniques for Formal Software Verific... |
FMCAD
2007
Springer
13 years 11 months ago
2007
Springer
Parameterized heuristics abound in computer aided design and verification, and manual tuning of the respective parameters is difficult and time-consuming. Very recent results from ...
SIGSOFT
2005
ACM
14 years 8 months ago
2005
ACM
Fluent model checking is an automated technique for verifying that an event-based operational model satisfies some state-based declarative properties. The link between the event-b...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Formal languages are increasingly used to describe the functional requirements (specifications) of circuits. These requirements are used as a means to communicate design intent an...
ECBS
2006
IEEE
13 years 11 months ago
2006
IEEE
We present in this paper a unified paradigm for the verification and validation of software and systems engineering design models expressed in UML 2.0 or SysML. This paradigm reli...
CADE
2009
Springer
14 years 8 months ago
2009
Springer
Scalable handling of real arithmetic is a crucial part of the verification of hybrid systems, mathematical algorithms, and mixed analog/digital circuits. Despite substantial advanc...