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VLSID
2003
IEEE
180views VLSI» more  VLSID 2003»
14 years 7 months ago
Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
Pao-Ann Hsiung, Shu-Yu Cheng
CL
2008
Springer
13 years 7 months ago
Automatic synthesis and verification of real-time embedded software for mobile and ubiquitous systems
Currently available application frameworks that target the automatic design of real-time embedded software are poor in integrating functional and non-functional requirements for m...
Pao-Ann Hsiung, Shang-Wei Lin
SIGSOFT
2007
ACM
14 years 8 months ago
Quantitative verification: models techniques and tools
Automated verification is a technique for establishing if certain properties, usually expressed in temporal logic, hold for a system model. The model can be defined using a high-l...
Marta Z. Kwiatkowska
FMICS
2006
Springer
13 years 11 months ago
Verified Design of an Automated Parking Garage
Parking garages that stow and retrieve cars automatically are becoming viable solutions for parking shortages. However, these are complex systems and a number of severe incidents i...
Aad Mathijssen, A. Johannes Pretorius
BIRTHDAY
2007
Springer
13 years 11 months ago
Automating Verification of Cooperation, Control, and Design in Traffic Applications
We present a verification methodology for cooperating traffic agents covering analysis of cooperation strategies, realization of strategies through control, and implementation of c...
Werner Damm, Alfred Mikschl, Jens Oehlerking, Erns...