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138
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TECS
2008
15 years 2 months ago
2008
tion. Transaction Level Modeling (TLM) has been proposed to abstract communication for highspeed system simulation and rapid design space exploration. Although being widely accepte...
146
Voted
MICRO
2010
IEEE
15 years 1 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
137
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WWW
2005
ACM
16 years 3 months ago
2005
ACM
We offer the first large-scale analysis of Web traffic based on network flow data. Using data collected on the Internet2 network, we constructed a weighted bipartite clientserver ...
109
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PODC
2004
ACM
15 years 8 months ago
2004
ACM
We establish a new worst-case upper bound on the Membership problem: We present a simple algorithm that is able to always achieve Agreement on Views within a single message latenc...
HPCA
1998
IEEE
15 years 6 months ago
1998
IEEE
Scalable shared-memory multiprocessors that are designed as Cache-Only Memory Architectures Coma allow automatic replication and migration of data in the main memory. This enhance...