TECS 2008 - PDF Preprint Papers

TECS 2008

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TECS
2008

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Quantitative analysis of the speed/accuracy trade-off in transaction level modeling

14 years 10 days ago

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tion. Transaction Level Modeling (TLM) has been proposed to abstract communication for highspeed system simulation and rapid design space exploration. Although being widely accepte...

Gunar Schirner, Rainer Dömer

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Id	Views	Title	Status

1	122	Quantitative analysis of the speed/accuracy trade-off in transaction level modeling	claim
2	119	Fast exploration of bus-based communication architectures at the CCATB abstraction	claim
3	94	Composing heterogeneous reactive systems	claim
4	88	From the prototype to the final embedded system using the Ocarina AADL tool suite	claim
5	76	Accurate and fast system-level power modeling: An XScale-based case study	claim
6	74	Dynamic scratchpad memory management for code in portable systems with an MMU	claim
7	73	Design and optimization of distributed sensing coverage in wireless sensor networks	claim
8	70	Minimal placement of bank selection instructions for partitioned memory architectures	claim
9	68	High-performance packet classification algorithm for multithreaded IXP network processor	claim
10	65	A design framework for real-time embedded systems with code size and energy constraints	claim
11	65	Attack-tolerant localization via iterative verification of locations in sensor networks	claim
12	61	Compositional real-time scheduling framework with periodic model	claim
13	61	Prefabrication and postfabrication architecture exploration for partially reconfigurable VLIW processors	claim
14	60	Verifying average dwell time of hybrid systems	claim
15	58	Semantics-preserving multitask implementation of synchronous programs	claim
16	58	Improving SDRAM access energy efficiency for low-power embedded systems	claim
17	56	The worst-case execution-time problem - overview of methods and survey of tools	claim
18	52	Causality interfaces for actor networks	claim
19	50	Implementing fault-tolerance in real-time programs by automatic program transformations	claim
20	47	Platform-based software design flow for heterogeneous MPSoC	claim
21	47	Modeling and analysis of core-centric network processors	claim
22	38	NWSLite: A general-purpose, nonparametric prediction utility for embedded systems	claim

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