294 search results - page 10 / 59 » A System Level Resource Estimation Tool for FPGAs |
DAC
2005
ACM
14 years 11 months ago
2005
ACM
In this paper we present a system level technique for mapping large, multiple-IP-block designs to channel-width constrained FPGAs. Most FPGA clustering tools [2, 3, 11] aim to red...
DAC
2007
ACM
14 years 11 months ago
2007
ACM
Emerging single-chip heterogeneous multiprocessors feature hundreds of design elements contending for shared resources, making it difficult to isolate performance impacts of indiv...
FPL
2005
Springer
14 years 4 months ago
2005
Springer
This paper addresses exploitation of the capabilities of platform FPGAs to implement embedded networking for systems on chip. In particular, a methodology for exploring trade-offs...
CBSE
2004
Springer
14 years 4 months ago
2004
Springer
Embedded systems must be cost-effective. This imposes strict requirements on the resource consumption of their applications. It is therefore desirable to be able to determine the ...
ISCAS
2008
IEEE
14 years 5 months ago
2008
IEEE
— This paper presents models for estimating the transition activity of signals at the output of adders in Field Programmable Gate Arrays (FPGAs), given only word-level measures o...