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» A System Level Resource Estimation Tool for FPGAs
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IPPS
2006
IEEE
14 years 4 months ago
A high level SoC power estimation based on IP modeling
Current electronic system design requires to be concerned with power consumption consideration. However, in a lot of design tools, the application power consumption budget is esti...
David Elléouet, Nathalie Julien, Dominique ...
HCW
1998
IEEE
14 years 3 months ago
CCS Resource Management in Networked HPC Systems
CCS is a resource management system for parallel high-performance computers. At the user level, CCS provides vendor-independent access to parallel systems. At the system administr...
Axel Keller, Alexander Reinefeld
IEEEARES
2009
IEEE
14 years 5 months ago
Estimating ToE Risk Level Using CVSS
—Security management is about calculated risk and requires continuous evaluation to ensure cost, time and resource effectiveness. Parts of which is to make future-oriented, costb...
Siv Hilde Houmb, Virginia N. L. Franqueira
RTCSA
2007
IEEE
14 years 5 months ago
An MPSoC Performance Estimation Framework Using Transaction Level Modeling
— To use the tremendous hardware resources available in next generation MultiProcessor Systems-on-Chip (MPSoC) efficiently, rapid and accurate design space exploration (DSE) met...
Rabie Ben Atitallah, Smaïl Niar, Samy Meftali...
FPL
2001
Springer
136views Hardware» more  FPL 2001»
14 years 3 months ago
Building Asynchronous Circuits with JBits
Asynchronous logic design has been around for decades. However, only recently has it gained any commercial success. Research has focused on a wide variety of uses, from microproces...
Eric Keller