Sciweavers

294 search results - page 30 / 59
» A System Level Resource Estimation Tool for FPGAs
Sort
View
VLSISP
2008
132views more  VLSISP 2008»
13 years 10 months ago
Scenario Selection and Prediction for DVS-Aware Scheduling of Multimedia Applications
Modern multimedia applications usually have real-time constraints and they are implemented using application-domain specific embedded processors. Dimensioning a system requires acc...
Stefan Valentin Gheorghita, Twan Basten, Henk Corp...
FPGA
2000
ACM
161views FPGA» more  FPGA 2000»
14 years 2 months ago
The effect of LUT and cluster size on deep-submicron FPGA performance and density
In this paper we revisit the FPGA architectural issue of the effect of logic block functionality on FPGA performance and density. In particular, in the context of lookup table, cl...
Elias Ahmed, Jonathan Rose
DATESO
2009
121views Database» more  DATESO 2009»
13 years 8 months ago
Translation of Ontology Retrieval Problem into Relational Queries
Ontology as a knowledge base can provide different reasoning tasks, e.g. to check consistency of the ontology or to check whether a resource is instance of a concept or not. In thi...
Jaroslav Pokorný, Jana Pribolová, Pe...
LREC
2008
193views Education» more  LREC 2008»
14 years 9 days ago
Eksairesis: A Domain-Adaptable System for Ontology Building from Unstructured Text
This paper describes Eksairesis, a system for learning economic domain knowledge automatically from Modern Greek text. The knowledge is in the form of economic terms and the seman...
Katia Kermanidis, Aristomenis Thanopoulos, Manolis...
DSD
2010
IEEE
137views Hardware» more  DSD 2010»
13 years 9 months ago
A C-to-RTL Flow as an Energy Efficient Alternative to Embedded Processors in Digital Systems
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
Sameer D. Sahasrabuddhe, Sreenivas Subramanian, Ku...