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» A Systematic Process to Design Product Line Architecture
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DAC
2009
ACM
14 years 2 months ago
Beyond verification: leveraging formal for debugging
The latest advancements in the commercial formal model checkers have enabled the integration of formal property verification with the conventional testbench based methods in the o...
Rajeev K. Ranjan, Claudionor Coelho, Sebastian Ska...
ICIP
2002
IEEE
14 years 9 months ago
Directional wavelet transforms and frames
The application of the wavelet transform in image processing is most frequently based on a separable transform. Lines and columns in an image are treated independently and the bas...
Pier Luigi Dragotti, Vladan Velisavljevic, Martin ...
INTEGRATION
2010
172views more  INTEGRATION 2010»
13 years 6 months ago
Analog circuits optimization based on evolutionary computation techniques
1 — This paper presents a new design automation tool based on a modified genetic algorithm kernel, in order to increase efficiency on the analog circuit and system design cycle. ...
Manuel F. M. Barros, Jorge Guilherme, Nuno Horta
ICCD
2006
IEEE
124views Hardware» more  ICCD 2006»
14 years 4 months ago
Customizable Fault Tolerant Caches for Embedded Processors
Abstract— The continuing divergence of processor and memory speeds has led to the increasing reliance on larger caches which have become major consumers of area and power in embe...
Subramanian Ramaswamy, Sudhakar Yalamanchili
ICSE
2007
IEEE-ACM
14 years 8 months ago
Performance Evaluation and Prediction for Legacy Information Systems
Database-centric information systems are critical to the operations of large organisations. In particular, they often process a large amount of data with stringent performance req...
Yan Jin, Antony Tang, Jun Han, Yan Liu