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» A Systematic Process to Design Product Line Architecture
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ANCS
2007
ACM
13 years 11 months ago
Ruler: high-speed packet matching and rewriting on NPUs
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
Tomas Hruby, Kees van Reeuwijk, Herbert Bos
DTJ
1998
171views more  DTJ 1998»
13 years 7 months ago
Measurement and Analysis of C and C++ Performance
ir increasing use of abstraction, modularity, delayed binding, polymorphism, and source reuse, especially when these attributes are used in combination. Modern processor architectu...
Hemant G. Rotithor, Kevin W. Harris, Mark W. Davis
SIGCOMM
2010
ACM
13 years 8 months ago
SwitchBlade: a platform for rapid deployment of network protocols on programmable hardware
We present SwitchBlade, a platform for rapidly deploying custom protocols on programmable hardware. SwitchBlade uses a pipeline-based design that allows individual hardware module...
Muhammad Bilal Anwer, Murtaza Motiwala, Muhammad M...
DAC
2005
ACM
14 years 8 months ago
Advanced Timing Analysis Based on Post-OPC Extraction of Critical Dimensions
While performance specifications are verified before sign-off for a modern nanometer scale design, extensive application of optical proximity correction substantially alters the l...
Puneet Gupta, Andrew B. Kahng, Youngmin Kim, Denni...
EUROMICRO
1998
IEEE
14 years 2 days ago
System Level Modelling for Hardware/Software Systems
Industry is facing a crisis in the design of complex hardware/software systems. Due to the increasing complexity, the gap between the generation of a product idea and the realisat...
Jeroen Voeten, P. H. A. van der Putten, Marc Geile...