452 search results - page 88 / 91 » A Systematic Process to Design Product Line Architecture |
COMCOM
2006
13 years 7 months ago
2006
This paper discusses issues of personalization of presence services in the context of Internet Telephony. Such services take into consideration the willingness and ability of a use...
DAC
2005
ACM
13 years 9 months ago
2005
ACM
This paper proposes a fast decoupling capacitance (decap) allocation and budgeting algorithm for both early stage decap estimation and later stage decap minimization in today’s ...
IEEEPACT
2008
IEEE
14 years 2 months ago
2008
IEEE
Moore’s Law and the drive towards performance efficiency have led to the on-chip integration of general-purpose cores with special-purpose accelerators. Pangaea is a heterogeneo...
VLSID
2007
IEEE
14 years 8 months ago
2007
IEEE
Title of thesis: EFFICIENT AND ACCURATE STATISTICAL TIMING ANALYSIS FOR NON-LINEAR NON-GAUSSIAN VARIABILITY WITH INCREMENTAL ATTRIBUTES Ashish Dobhal, Master of Science, 2006 Thes...
ASPLOS
2006
ACM
14 years 1 months ago
2006
ACM
While the number of transistors on a chip increases exponentially over time, the productivity that can be realized from these systems has not kept pace. To deal with the complexit...