ASPLOS 2006 - PDF Preprint Papers

ASPLOS 2006 Architectural Support for Programming Languages and Operating Systems

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ASPLOS
2006
ACM

310views Programming Languages» more ASPLOS 2006»

Combinatorial sketching for finite programs

14 years 5 months ago

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Sketching is a software synthesis approach where the programmer develops a partial implementation — a sketch — and a separate speciﬁcation of the desired functionality. The ...

Armando Solar-Lezama, Liviu Tancau, Rastislav Bod&...

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Id	Views	Title	Status

1	310	Combinatorial sketching for finite programs	claim
2	210	Temporal search: detecting hidden malware timebombs with virtual machines	claim
3	190	Type inference for unboxed types and first class mutability	claim
4	189	SlicK: slice-based locality exploitation for efficient redundant multithreading	claim
5	185	Geiger: monitoring the buffer cache in a virtual machine environment	claim
6	163	Introspective 3D chips	claim
7	162	AVIO: detecting atomicity violations via access interleaving invariants	claim
8	154	Supporting nested transactional memory in logTM	claim
9	152	Understanding prediction-based partial redundant threading for low-overhead, high- coverage fault tolerance	claim
10	150	Integrated network interfaces for high-bandwidth TCP/IP	claim
11	145	Accelerator: using data parallelism to program GPUs for general-purpose uses	claim
12	144	Accurate and efficient filtering for the Intel thread checker race detector	claim
13	143	Accurate and efficient regression modeling for microarchitectural performance and power prediction	claim
14	138	Mercury and freon: temperature emulation and management for server systems	claim
15	137	Tradeoffs in transactional memory virtualization	claim
16	136	Unbounded page-based transactional memory	claim
17	133	Bell: bit-encoding online memory leak detection	claim
18	125	Architectural support for software-based protection	claim
19	121	Comprehensively and efficiently protecting the heap	claim
20	118	Recording shared memory dependencies using strata	claim
21	117	Efficiently exploring architectural design spaces via predictive modeling	claim
22	116	SecCMP: a secure chip-multiprocessor architecture	claim
23	115	HeapMD: identifying heap-based bugs using anomaly detection	claim
24	113	OSEK/VDX API for Java	claim
25	112	ExecRecorder: VM-based full-system replay for attack analysis and system recovery	claim
26	112	A spatial path scheduling algorithm for EDGE architectures	claim
27	110	A performance counter architecture for computing accurate CPI components	claim
28	110	Instruction scheduling for a tiled dataflow architecture	claim
29	109	Tartan: evaluating spatial computation for whole program execution	claim
30	109	A defect tolerant self-organizing nanoscale SIMD architecture	claim
31	107	Software-based instruction caching for embedded processors	claim
32	106	Atomicity and visibility in tiny embedded systems	claim
33	106	Computation spreading: employing hardware migration to specialize CMP cores on-the-fly	claim
34	104	Automatic generation of peephole superoptimizers	claim
35	101	Dependable != unaffordable	claim
36	100	A new idiom recognition framework for exploiting hardware-assist instructions	claim
37	100	Improving software security via runtime instruction-level taint checking	claim
38	100	PicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor	claim
39	100	Efficient type and memory safety for tiny embedded systems	claim
40	95	A regulated transitive reduction (RTR) for longer memory race recording	claim
41	94	Semantic patches for documenting and automating collateral evolutions in Linux device drivers	claim
42	91	Manitou: a layer-below approach to fighting malware	claim
43	90	Exploiting coarse-grained task, data, and pipeline parallelism in stream programs	claim
44	90	Tradeoffs in fine-grained heap memory protection	claim
45	89	A comparison of software and hardware techniques for x86 virtualization	claim
46	89	Stealth prefetching	claim
47	87	Ultra low-cost defect protection for microprocessor pipelines	claim
48	85	Log-based architectures for general-purpose monitoring of deployed code	claim
49	84	Writing Solaris device drivers in Java	claim
50	84	Hunting Trojan Horses	claim
51	83	Mapping esterel onto a multi-threaded embedded processor	claim
52	82	A probabilistic pointer analysis for speculative optimizations	claim
53	80	Portability events: a programming model for scalable system infrastructures	claim
54	78	A program transformation and architecture support for quantum uncomputation	claim
55	71	A: an assertion language for distributed systems	claim
56	71	Issues in holistic system design	claim

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