106 search results - page 14 / 22 » A Task-Centric Memory Model for Scalable Accelerator Archite... |
RTSS
2000
IEEE
14 years 7 days ago
2000
IEEE
The maturity of schedulabilty analysis techniquesfor fired-prioritypreemptive scheduling has enabled the consideration of timing issues at design time using a specification of the...
EUROPAR
2009
Springer
13 years 11 months ago
2009
Springer
Abstract. In the field of HPC, the current hardware trend is to design multiprocessor architectures that feature heterogeneous technologies such as specialized coprocessors (e.g., ...
PDP
2010
IEEE
14 years 1 months ago
2010
IEEE
- We present a parallel conjugate gradient solver for the Poisson problem optimized for multi-GPU platforms. Our approach includes a novel heuristic Poisson preconditioner well sui...
JAVA
2001
Springer
14 years 9 days ago
2001
Springer
Rapid commoditization of advanced hardware and progress of networking technology is now making wide area high-performance computing a.k.a. the ‘Grid’ Computing a reality. Sinc...
ICDCS
1996
IEEE
14 years 1 days ago
1996
IEEE
We introduce a shared memory software prototype system for executing programs with nested parallelism on a network of workstations. This programming model exhibits a very convenie...