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» A Temporal Logic Approach to the Specification of Reconfigur...
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DLOG
2006
13 years 9 months ago
Model checking the basic modalities of CTL with Description Logic
Abstract. Model checking is a fully automated technique for determining whether the behaviour of a finite-state reactive system satisfies a temporal logic specification. Despite th...
Shoham Ben-David, Richard J. Trefler, Grant E. Wed...
BIRTHDAY
2010
Springer
14 years 9 days ago
The Arrow of Time through the Lens of Computing
Egon Börger Ambient Abstract State Machines with Applications 11:00 AM Manfred Broy Realizability of System Interface Specifications 11:30 AM Ofer Strichman Proving Equivalence be...
Krishna V. Palem
ICFP
2010
ACM
13 years 7 months ago
ReCaml: execution state as the cornerstone of reconfigurations
Most current techniques fail to achieve the dynamic update of recursive functions. A focus on execution states appears to be essential in order to implement dynamic update in this...
Jérémy Buisson, Fabien Dagnat
CDC
2010
IEEE
144views Control Systems» more  CDC 2010»
13 years 2 months ago
Formal analysis of piecewise affine systems through formula-guided refinement
Abstract-- We present a computational framework for identifying a set of initial states from which all trajectories of a piecewise affine (PWA) system satisfy a Linear Temporal Log...
Boyan Yordanov, Jana Tumova, Calin Belta, Ivana Ce...
FCCM
2004
IEEE
118views VLSI» more  FCCM 2004»
13 years 11 months ago
Virtual Memory Window for a Portable Reconfigurable Cryptography Coprocessor
Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
Miljan Vuletic, Laura Pozzi, Paolo Ienne