1860 search results - page 343 / 372 » A Temporal Logic of Robustness |
SLIP
2003
ACM
14 years 1 months ago
2003
ACM
Aggressive process scaling and increasing clock rates have made crosstalk noise an important issue in VLSI design. Switching on adjacent wires on long bus lines can increase delay...
TPHOL
2002
IEEE
14 years 1 months ago
2002
IEEE
g Higher Order Abstract Syntax with Tactical Theorem Proving and (Co)Induction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 ...
LCPC
2009
Springer
14 years 1 months ago
2009
Springer
PC grids represent massive computation capacity at a low cost, but are challenging to employ for parallel computing because of variable and unpredictable performance and availabili...
ICCAD
1999
IEEE
14 years 29 days ago
1999
IEEE
In Deep Sub-Micron (DSM) designs, performance will depend critically on the latency of long wires. We propose a new synthesis methodology for synchronous systems that makes the de...
ICTAI
1997
IEEE
14 years 26 days ago
1997
IEEE
Many black box optimization algorithms have sufcient exibility to allow them to adapt to the varying circumstances they encounter. These capabilities are of two primary sorts: 1) ...