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» A Test Generation Strategy for Pairwise Testing
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WEA
2005
Springer
109views Algorithms» more  WEA 2005»
14 years 2 months ago
Synchronization Fault Cryptanalysis for Breaking A5/1
Abstract. A5/1 pseudo-random bit generator, known from GSM networks, potentially might be used for different purposes, such as secret hiding during cryptographic hardware testing, ...
Marcin Gomulkiewicz, Miroslaw Kutylowski, Heinrich...
MICRO
2000
IEEE
124views Hardware» more  MICRO 2000»
14 years 1 months ago
Calpa: a tool for automating selective dynamic compilation
Selective dynamic compilation systems, typically driven by annotations that identify run-time constants, can achieve significant program speedups. However, manually inserting ann...
Markus Mock, Craig Chambers, Susan J. Eggers
AAAI
2007
13 years 11 months ago
Acquiring Visibly Intelligent Behavior with Example-Guided Neuroevolution
Much of artificial intelligence research is focused on devising optimal solutions for challenging and well-defined but highly constrained problems. However, as we begin creating...
Bobby D. Bryant, Risto Miikkulainen
JAIR
1998
97views more  JAIR 1998»
13 years 8 months ago
The Divide-and-Conquer Subgoal-Ordering Algorithm for Speeding up Logic Inference
It is common to view programs as a combination of logic and control: the logic part de nes what the program must do, the control part how to do it. The Logic Programming paradigm ...
Oleg Ledeniov, Shaul Markovitch
ICFP
2001
ACM
14 years 8 months ago
Functioning without Closure: Type-Safe Customized Function Representations for Standard ML
The CIL compiler for core Standard ML compiles whole ML programs using a novel typed intermediate language that supports the generation of type-safe customized data representation...
Allyn Dimock, Ian Westmacott, Robert Muller, Frank...