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» A Three-Stage Load-Balancing Switch
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112
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ICC
2008
IEEE
126views Communications» more  ICC 2008»
15 years 10 months ago
Backlog Aware Scheduling for Large Buffered Crossbar Switches
—A novel architecture was proposed in [1] to address scalability issues in large, high speed packet switches. The architecture proposed in [1], namely OBIG (output buffers with i...
Aditya Dua, Benjamin Yolken, Nicholas Bambos, Wlad...
127
Voted
ICPPW
2006
IEEE
15 years 9 months ago
Parallel Implementation of the Polyhedral Homotopy Method
Homotopy methods to solve polynomial systems are well suited for parallel computing because the solution paths defined by the homotopy can be tracked independently. For sparse po...
Jan Verschelde, Yan Zhuang
166
Voted
CNSR
2010
IEEE
164views Communications» more  CNSR 2010»
15 years 7 months ago
Buffered Crossbar Fabrics Based on Networks on Chip
— Buffered crossbar (CICQ) switches have shown a high potential in scaling Internet routers capacity. However, they require expensive on-chip buffers whose cost grows quadratical...
Lotfi Mhamdi, Kees Goossens, Iria Varela Senin
85
Voted
ICC
2007
IEEE
15 years 10 months ago
Optimization of the Self-Protecting Multipath for Deployment in Legacy Networks
—The self-protecting multipath (SPM) is a simple protection switching mechanism that can be implemented, e.g., by MPLS. We present a linear program for the optimization of the SP...
Michael Menth, Rüdiger Martin, Ulrich Spö...
120
Voted
DSD
2009
IEEE
118views Hardware» more  DSD 2009»
15 years 10 months ago
Internet-Router Buffered Crossbars Based on Networks on Chip
—The scalability and performance of the Internet depends critically on the performance of its packet switches. Current packet switches are based on single-hop crossbar fabrics, w...
Kees Goossens, Lotfi Mhamdi, Iria Varela Senin