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DATE
2009
IEEE
113views Hardware» more  DATE 2009»
14 years 4 months ago
Scalable compile-time scheduler for multi-core architectures
As the number of cores continues to grow in both digital signal and general purpose processors, tools which perform automatic scheduling from model-based designs are of increasing...
Maxime Pelcat, Pierrick Menuet, Slaheddine Aridhi,...
DSN
2009
IEEE
14 years 4 months ago
Maximizing system lifetime by battery scheduling
The use of mobile devices is limited by the battery lifetime. Some devices have the option to connect an extra battery, or to use smart battery-packs with multiple cells to extend...
Marijn R. Jongerden, Boudewijn R. Haverkort, Henri...
GLOBECOM
2009
IEEE
14 years 4 months ago
Design of Signal Constellation Rearrangement (CoRe) for Multiple Relay Links
Abstract – This paper considers a design of signal constellations for trans-modulation (constellation rearrangement: CoRe) in a relay system with the multiple links in which the ...
Jin Woo Kim, Hee S. Lee, Jae Yung Ahn, Chung Gu Ka...
GLOBECOM
2009
IEEE
14 years 4 months ago
Model-Based Opportunistic Channel Access in Dynamic Spectrum Access Networks
Abstract—We propose a model-based channel access mechanism for cognitive radio-enabled secondary network, which opportunistically uses the channel of an unslotted primary network...
Manuj Sharma, Anirudha Sahoo, K. D. Nayak
ICASSP
2009
IEEE
14 years 4 months ago
Microarray classification using block diagonal linear discriminant analysis with embedded feature selection
In this paper, block diagonal linear discriminant analysis (BDLDA) is improved and applied to gene expression data. BDLDA is a classification tool with embedded feature selection...
Lingyan Sheng, Roger Pique-Regi, Shahab Asgharzade...