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CODES
2009
IEEE
13 years 8 months ago
A scalable parallel H.264 decoder on the cell broadband engine architecture
The H.264 video codec provides exceptional video compression while imposing dramatic increases in computational complexity over previous standards. While exploiting parallelism in...
Michael A. Baker, Pravin Dalale, Karam S. Chatha, ...
ICCAD
2003
IEEE
138views Hardware» more  ICCAD 2003»
14 years 4 months ago
Multi-Million Gate FPGA Physical Design Challenges
The recent past has seen a tremendous increase in the size of design circuits that can be implemented in a single FPGA. These large design sizes significantly impact cycle time du...
Maogang Wang, Abhishek Ranjan, Salil Raje
WOSP
2005
ACM
14 years 1 months ago
From UML to LQN by XML algebra-based model transformations
The change of focus from code to models promoted by OMG's Model Driven Development raises the need for verification of nonfunctional characteristics of UML models, such as pe...
Gordon Ping Gu, Dorina C. Petriu
CASES
2005
ACM
13 years 9 months ago
Optimizing stream programs using linear state space analysis
Digital Signal Processing (DSP) is becoming increasingly widespread in portable devices. Due to harsh constraints on power, latency, and throughput in embedded environments, devel...
Sitij Agrawal, William Thies, Saman P. Amarasinghe
ASPLOS
2012
ACM
12 years 3 months ago
Comprehensive kernel instrumentation via dynamic binary translation
Dynamic binary translation (DBT) is a powerful technique that enables fine-grained monitoring and manipulation of an existing program binary. At the user level, it has been emplo...
Peter Feiner, Angela Demke Brown, Ashvin Goel