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ASPDAC
2006
ACM
133views Hardware» more  ASPDAC 2006»
14 years 4 months ago
An SPU reference model for simulation, random test generation and verification
– An instruction set level reference model was developed for the development of synergistic processing unit (SPU) , which is one of the key components of the cell processor [1][2...
Yukio Watanabe, Balazs Sallay, Brad W. Michael, Da...
DAC
1996
ACM
14 years 2 months ago
Improving the Efficiency of Power Simulators by Input Vector Compaction
Accurate power estimation is essential for low power digital CMOS circuit design. Power dissipation is input pattern dependent. To obtain an accurate power estimate, a large input...
Chi-Ying Tsui, Radu Marculescu, Diana Marculescu, ...
FLAIRS
1998
14 years 3 days ago
Learning to Race: Experiments with a Simulated Race Car
Our focus is on designing adaptable agents for highly dynamic environments. Wehave implementeda reinforcement learning architecture as the reactive componentof a twolayer control ...
Larry D. Pyeatt, Adele E. Howe
ICDIM
2010
IEEE
13 years 8 months ago
Simulation integration for healthcare education, training and assessment
Funded as part of the `Network Enabled Platforms' program the Health Services Virtual Organization (HSVO) Project has developed a network-enabled platform (NEP) consisting of...
Rachel H. Ellaway, Jeremy R. Cooperstock, Bruce Sp...
IEEECIT
2010
IEEE
13 years 8 months ago
SESAM: An MPSoC Simulation Environment for Dynamic Application Processing
Future systems will have to support multiple and concurrent dynamic compute-intensive applications, while respecting real-time and energy consumption constraints. With the increase...
Nicolas Ventroux, Alexandre Guerre, Tanguy Sassola...