When integrating dierent system components, the interaction between dierent features is often error prone. Typically errors occur on interruption, concurrency or disabling/ enabli...
This paper presents a unifying framework for the modeling of asynchronous pipeline circuits. A pipeline protocol is captured in a graph-based model which defines the partial order...
SystemC is the de facto standard for modeling embedded systems. It allows system design at various levels of abstractions, provides typical object-orientation features and incorpo...
We apply the Jigsaw cooperative learning model to our CS1 closed labs. The Jigsaw cooperative learning model assigns students into main groups in which each group member is respon...
Most RAID controllers implemented in industry are complicated and di cult to reason about. This complexity has led to software and hardware systems that are di cult to debug and h...