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» A Visual Approach to Validating System Level Designs
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VR
2010
IEEE
133views Virtual Reality» more  VR 2010»
13 years 7 months ago
The role of latency in the validity of AR simulation
It is extremely challenging to run controlled studies comparing multiple Augmented Reality (AR) systems. We use an AR simulation approach, in which a Virtual Reality (VR) system i...
Cha Lee, Scott Bonebrake, Tobias Höllerer, Do...
EUROMICRO
1999
IEEE
14 years 1 months ago
Design Space Exploration in System Level Synthesis under Memory Constraints
This paper addresses the problem of component selection, task assignment and task scheduling for distributed embedded computer systems. Such systems have a large number of constra...
Radoslaw Szymanek, Krzysztof Kuchcinski
WSC
2004
13 years 10 months ago
Implementing the High Level Architecture in the Virtual Test Bed
The Virtual Test Bed (VTB) is a prototype of a virtual engineering environment to study operations of current and future space vehicles, spaceports, and ranges. The HighLevel Arch...
José A. Sepúlveda, Luis C. Rabelo, J...
JUCS
2002
113views more  JUCS 2002»
13 years 8 months ago
The Origins and the Development of the ASM Method for High Level System Design and Analysis
: The research belonging to the Abstract State Machines approach to system design and analysis is surveyed and documented in an annotated ASM bibliography. The survey covers the pe...
Egon Börger
TRECVID
2007
13 years 10 months ago
UEC at TRECVID 2007 High Level Feature Task
In this paper, we describe our approach and results for high-level feature extraction task at TRECVID 2007. This year, we adopted late fusion of several types of features. As a ï¬...
O. Liu, Z. Tang, K. Yanai