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DATE
2010
IEEE
168views Hardware» more  DATE 2010»
15 years 7 months ago
A new placement algorithm for the mitigation of multiple cell upsets in SRAM-based FPGAs
Modern FPGAs have been designed with advanced integrated circuit techniques that allow high speed and low power performance, joined to reconfiguration capabilities. This makes new...
Luca Sterpone, Niccolò Battezzati
GLVLSI
2000
IEEE
145views VLSI» more  GLVLSI 2000»
15 years 7 months ago
Manhattan or non-Manhattan?: a study of alternative VLSI routing architectures
Circuit interconnect has become a substantial obstacle in the design of high performance systems. In this paper we explore a new routing paradigm that strikes at the root of the i...
Cheng-Kok Koh, Patrick H. Madden
IPPS
2005
IEEE
15 years 8 months ago
Fault-Tolerant Parallel Applications with Dynamic Parallel Schedules
Commodity computer clusters are often composed of hundreds of computing nodes. These generally off-the-shelf systems are not designed for high reliability. Node failures therefore...
Sebastian Gerlach, Roger D. Hersch
EDOC
2003
IEEE
15 years 7 months ago
A Software Architecture for Industrial Automation
The Aspect Integrator Platform (AIP) from ABB was designed to build the next generation of industrial automation applications. This platform is part of a set of products that prov...
Rodrigo García García, Esther Gelle,...
SIGMETRICS
2010
ACM
139views Hardware» more  SIGMETRICS 2010»
15 years 7 months ago
On the flow-level dynamics of a packet-switched network
: The packet is the fundamental unit of transportation in modern communication networks such as the Internet. Physical layer scheduling decisions are made at the level of packets, ...
Ciamac Cyrus Moallemi, Devavrat Shah