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» A Visual Approach to Validating System Level Designs
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APPT
2007
Springer
14 years 3 months ago
Domain Level Page Sharing in Xen Virtual Machine Systems
The memory size limits the scalability of virtual machine systems. There have been some researches about sharing identical pages among guest systems to reduce memory usage. However...
Myeongjae Jeon, Euiseong Seo, Junghyun Kim, Joonwo...
DAC
2007
ACM
14 years 26 days ago
A Framework for the Validation of Processor Architecture Compliance
We present a framework for validating the compliance of a design with a given architecture. Our approach is centered on the concept of misinterpretations. These include missing be...
Allon Adir, Sigal Asaf, Laurent Fournier, Itai Jae...
ICCD
2007
IEEE
133views Hardware» more  ICCD 2007»
14 years 5 months ago
System level power estimation methodology with H.264 decoder prediction IP case study
This paper presents a methodology to generate a hierarchy of power models for power estimation of custom hardware IP blocks, enabling a trade-off between power estimation accuracy...
Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi,...
VL
1999
IEEE
112views Visual Languages» more  VL 1999»
14 years 1 months ago
Visual Specification of Spatio-Temporal Developments
In this paper we propose a visual interface for the specification of predicates to be used in queries on spatio-temporal databases. The approach is based on a visual specification...
Martin Erwig, Markus Schneider
VDB
2000
135views Database» more  VDB 2000»
13 years 10 months ago
Query-By-Trace: Visual Predicate Specification in Spatio-Temporal Databases
In this paper we propose a visual interface for the specification of predicates to be used in queries on spatio-temporal databases. The approach is based on a visual specification ...
Martin Erwig, Markus Schneider