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ASAP
2008
IEEE
146views Hardware» more  ASAP 2008»
14 years 2 months ago
A multi-FPGA application-specific architecture for accelerating a floating point Fourier Integral Operator
Many complex systems require the use of floating point arithmetic that is exceedingly time consuming to perform on personal computers. However, floating point operators are also h...
Jason Lee, Lesley Shannon, Matthew J. Yedlin, Gary...
IPPS
2008
IEEE
14 years 2 months ago
A plug-and-play model for evaluating wavefront computations on parallel architectures
This paper develops a plug-and-play reusable LogGP model that can be used to predict the runtime and scaling behavior of different MPI-based pipelined wavefront applications runni...
Gihan R. Mudalige, Mary K. Vernon, Stephen A. Jarv...
ASPLOS
2010
ACM
14 years 24 days ago
An asymmetric distributed shared memory model for heterogeneous parallel systems
Heterogeneous computing combines general purpose CPUs with accelerators to efficiently execute both sequential control-intensive and data-parallel phases of applications. Existin...
Isaac Gelado, Javier Cabezas, Nacho Navarro, John ...
WORDS
2003
IEEE
14 years 1 months ago
Foucault's Pendulum in the Distributed Control Lab
The ’Distributed Control Lab’ [6] at Hasso-PlattnerInstitute, University of Potsdam allows experimentation with a variety of physical equipment via the web (intra and internet...
Andreas Rasche, Peter Tröger, Michael Dirska,...
ASPLOS
2009
ACM
14 years 8 months ago
Dynamic prediction of collection yield for managed runtimes
The growth in complexity of modern systems makes it increasingly difficult to extract high-performance. The software stacks for such systems typically consist of multiple layers a...
Michal Wegiel, Chandra Krintz