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114
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CGO
2010
IEEE
15 years 9 months ago
Integrated instruction selection and register allocation for compact code generation exploiting freeform mixing of 16- and 32-bi
For memory constrained embedded systems code size is at least as important as performance. One way of increasing code density is to exploit compact instruction formats, e.g. ARM T...
Tobias J. K. Edler von Koch, Igor Böhm, Bj&ou...
146
Voted
CODES
2004
IEEE
15 years 6 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
125
Voted
ICPPW
2002
IEEE
15 years 7 months ago
Near-Optimal Loop Tiling by Means of Cache Miss Equations and Genetic Algorithms
The effectiveness of the memory hierarchy is critical for the performance of current processors. The performance of the memory hierarchy can be improved by means of program transf...
Jaume Abella, Antonio González, Josep Llosa...
90
Voted
SAC
2005
ACM
15 years 8 months ago
Adaptation point analysis for computation migration/checkpointing
Finding the appropriate location of adaptation points for computation migration/checkpointing is critical since the distance between two consecutive adaptation points determines t...
Yanqing Ji, Hai Jiang, Vipin Chaudhary
141
Voted
GPC
2009
Springer
15 years 9 months ago
Efficient Parallelized Network Coding for P2P File Sharing Applications
In this paper, we investigate parallel implementation techniques for network coding to enhance the performance of Peer-to-Peer (P2P) file sharing applications. It is known that net...
Karam Park, Joon-Sang Park, Won Woo Ro