127 search results - page 15 / 26 » A cache-defect-aware code placement algorithm for improving ... |
PLDI
1994
ACM
13 years 11 months ago
1994
ACM
As microprocessor speeds increase, memory bandwidth is increasing y the performance bottleneck for microprocessors. This has occurred because innovation and technological improvem...
NOSSDAV
2009
Springer
14 years 2 months ago
2009
Springer
In multi-hop wireless networks, random network coding represents the general design principle of transmitting random linear combinations of blocks in the same “batch” to downs...
ASPLOS
2011
ACM
12 years 11 months ago
2011
ACM
Graphics processing units (GPUs) provide a low cost platform for accelerating high performance computations. The introduction of new programming languages, such as CUDA and OpenCL...
IPPS
2005
IEEE
14 years 1 months ago
2005
IEEE
We present an experimental study of parallel biconnected components algorithms employing several fundamental parallel primitives, e.g., prefix sum, list ranking, sorting, connect...
CODES
2004
IEEE
13 years 11 months ago
2004
IEEE
The memory subsystem accounts for a significant portion of the aggregate energy budget of contemporary embedded systems. Moreover, there exists a large potential for optimizing th...