Sciweavers

127 search results - page 22 / 26
» A cache-defect-aware code placement algorithm for improving ...
Sort
View
CODES
2007
IEEE
14 years 1 months ago
Three-dimensional multiprocessor system-on-chip thermal optimization
3D stacked wafer integration has the potential to improve multiprocessor system-on-chip (MPSoC) integration density, performance, and power efficiency. However, the power density...
Chong Sun, Li Shang, Robert P. Dick
IWMM
2011
Springer
206views Hardware» more  IWMM 2011»
12 years 10 months ago
A comprehensive evaluation of object scanning techniques
At the heart of all garbage collectors lies the process of identifying and processing reference fields within an object. Despite its key role, and evidence of many different impl...
Robin Garner, Stephen M. Blackburn, Daniel Frampto...
CODES
2007
IEEE
13 years 11 months ago
Influence of procedure cloning on WCET prediction
For the worst-case execution time (WCET) analysis, especially loops are an inherent source of unpredictability and loss of precision. This is caused by the difficulty to obtain sa...
Paul Lokuciejewski, Heiko Falk, Martin Schwarzer, ...
EWC
2006
61views more  EWC 2006»
13 years 7 months ago
Embarrassingly parallel mesh refinement by edge subdivision
We have previously proposed a new technique for the communication-free adaptive refinement of tetrahedral meshes that works for all configurations. Implementations of the scheme mu...
David C. Thompson, Philippe P. Pébay
IISWC
2009
IEEE
14 years 2 months ago
SD-VBS: The San Diego Vision Benchmark Suite
—In the era of multi-core, computer vision has emerged as an exciting application area which promises to continue to drive the demand for both more powerful and more energy effi...
Sravanthi Kota Venkata, Ikkjin Ahn, Donghwan Jeon,...