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CODES
2007
IEEE
14 years 1 months ago
Channel trees: reducing latency by sharing time slots in time-multiplexed networks on chip
Networks on Chip (NoC) have emerged as the design paradigm for scalable System on Chip communication infrastructure. A growing number of applications, often with firm (FRT) or so...
Andreas Hansson, Martijn Coenen, Kees Goossens
ASPLOS
2008
ACM
13 years 9 months ago
Optimistic parallelism benefits from data partitioning
Recent studies of irregular applications such as finite-element mesh generators and data-clustering codes have shown that these applications have a generalized data parallelism ar...
Milind Kulkarni, Keshav Pingali, Ganesh Ramanaraya...
PLDI
2003
ACM
14 years 21 days ago
Linear analysis and optimization of stream programs
As more complex DSP algorithms are realized in practice, an increasing need for high-level stream abstractions that can be compiled without sacrificing efficiency. Toward this en...
Andrew A. Lamb, William Thies, Saman P. Amarasingh...
VEE
2005
ACM
143views Virtualization» more  VEE 2005»
14 years 1 months ago
Optimized interval splitting in a linear scan register allocator
We present an optimized implementation of the linear scan register allocation algorithm for Sun Microsystems’ Java HotSpotTM client compiler. Linear scan register allocation is ...
Christian Wimmer, Hanspeter Mössenböck
CGO
2008
IEEE
13 years 9 months ago
Comprehensive path-sensitive data-flow analysis
Data-flow analysis is an integral part of any aggressive optimizing compiler. We propose a framework for improving the precision of data-flow analysis in the presence of complex c...
Aditya V. Thakur, R. Govindarajan