127 search results - page 7 / 26 » A cache-defect-aware code placement algorithm for improving ... |
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
In this paper, we present performance results from mapping five real-world DSP applications on an embedded system-on-chip that incorporates coarse-grain reconfigurable logic with ...
PPOPP
2009
ACM
14 years 8 months ago
2009
ACM
Recent advances in polyhedral compilation technology have made it feasible to automatically transform affine sequential loop nests for tiled parallel execution on multi-core proce...
CASES
2010
ACM
13 years 5 months ago
2010
ACM
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
CGO
2007
IEEE
13 years 11 months ago
2007
IEEE
Dynamic predication has been proposed to reduce the branch misprediction penalty due to hard-to-predict branch instructions. A recently proposed dynamic predication architecture, ...
CAINE
2006
13 years 9 months ago
2006
The synergy of software and hardware leads to efficient application expression profile (AEP) not only in terms of execution time and energy but also optimal architecture usage. We...